In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of digital signals (data) between hardware registers, and the logical operations performed on those signals.
Register-transfer-level abstraction is used in hardware description languages (HDLs) like Verilog and VHDL to create high-level representations of a circuit, from which lower-level representations and ultimately actual wiring can be derived. Design at the RTL level is typical practice in modern digital design.
ASICs stands for Application Specific Integrated Circuits, and refer to semiconductor solutions design for a particular application, as opposed to other solutions like Field Programmable Gate Arrays (FPGAs) which can be programmed multiple times to perform a different functions. ASIC is also sometimes referred to as SoC (System on Chip).

The first step in ASIC design flow is defining the specifications of the product before we embark on designing it. This phase typically involves market surveys with potential customers to figure out the needs and talking to the technology experts to gauge the future trends. The latter is particularly important because ASIC design cycle may be anywhere between 6 months to 2 years. It is therefore important to foresee and predict what trends would be relevant 1-2 years down the line if one needs to sell their product to a wide audience.
This marketing research translates into high-level product specifications like top level functionality of what you intend to do with your ASIC, specific computation algorithm that you want to implement, clock frequencies that would make the product appealing to the customers, package type- Ball Grid Array (BGA) or CSP (Chip Scale Package) etc., power supply, communication protocols that will help interface with the external world, temperature range that you would want your product to work in.
Developing a thorough and correct specification usually sets a solid foundation for the ASIC design. The technical specifications need refinement of the technical requirements over time, but it’s important to cover the information in an unambiguous manner.

Advantages of doing power estimation at RTL or architectural level

a) Designers use a Register-Transfer Level(RTL) description of the design to make optimizations and trade-offs very early in the design flow.
b) The presence of functional blocks in an RTL description makes the complexity of architectural design much more manageable even for large chips because RTL has granularity sufficiently larger than gate- or circuit-level descriptions.